Execution Speed up of Image Rotation Matrix Using Parallel Technique

Authors

  • Dr. Fahraldeen Aldulaimi Mosul University, Dept. of Computer Engineering, Erbil 44001, Iraq
  • Hadeel Alshakargy Mosul University, Dept. of Computer Engineering, Erbil 44001, Iraq

Keywords:

vertices, CPU, Central Processing Unit, GPGPU, General Purpose Graphic Processing Unit.

Abstract

In computer graphic science rotating a vertex in an image around a specific point in any direction is a time consuming mission. The rotation of a vertex depends on multiplying it's coordinates by graphic geometric transformation matrices, this multiplication requires a considerable time. In this paper the acceleration of image rotation is achieved by using parallel techniques such as using Multicore Core Central Processing Unit (CPU) or General Purpose Graphic Processing Unit (GPGPU) or even both. The results show a significant increase in computation speed when rotating a large number of vertices by using CPU. A considerable acceleration is achieved when GPU is used to make image rotation. However the speedup is limited by the number of processing units available for parallel processing.

References

[1] Sahin, Ibrahim. "A 32-bit floating-point module design for 3D graphic transformations". Scientific Research and Essays Journal, Vol.5, pp 3070-3081, 18 October 2010.
[2] Salomon, David. "Computer graphics and geometric modeling". Computers and Mathematics with Application Journal, Vol.38, pp. 289-298, 1999.
[3] Paeth, Alan W. "A fast algorithm for general raster rotation". Canadian Information Processing Society, 1986, pp. 77-81.
[4] Huang, Beilei. Edmund M-K. Lai, and A. P. Vinod. "Image resizing and rotation based on the consistent resampling theory". International Symposium on Intelligent Signal Processing and Communications Systems, Fep 2009, pp 1-4.
[5] Nickolls, John and Buck, Ian and Garland, Michael and Skadron, Kevin. "Scalable parallel programming with CUDA". Queue Journal. Vol.6, pp.40-53, 1/ March 2008.
[6] Karas, Pavel. "Gpu acceleration of image processing algorithms". PhD, Masarykova univerzita, Fakulta informatiky, 2011.
[7] Liu, Zhi Yuan, and Xue Zhang Zhao. "Research and Implementation of Image Rotation Based on CUDA" In Advanced Materials Research Organization, Vol.216, Yuhang Yang, Xilong Qu, Yiping Luo and Aimin Yang, Ed. switzerland: Trans Tech Publications, 2011, pp. 708-712.
[8] Minhas, Umar Ibrahim, Samuel Bayliss, and George A. Constantinides. "GPU vs FPGA: A comparative analysis for non-standard precision" In Reconfigurable Computing: Architectures, Tools, and Applications, 10th, Vol.8405, Diana Goehringer, Marco Domenico Santambrogio, João M.P. Cardoso, Koen Bertels,Ed. Portugal, Springer International Publishing, 2014, pp. 298-305.
[9] Hochberg, Robert. "Matrix Multiplication with CUDA-a basic introduction to the CUDA programming model." Internet": http://www.shodor.org/media/content/petascale/materials/UPModules /matrixMultiplication/moduleDocument.pdf, [August 11 2012].
[10] Jang, Byunghyun, "Evaluation and enhancement of memory efficiency targeting general-purpose computations on scalable data-parallel GPU architectures.'' PhD, Northeastern University Department of Electrical and Computer Engineering, United States–Massachusetts, ProQuest Dissertations Publishing , 2010.
[11] Neelap, Akash Kiran. "Performance analysis of GPGPU and CPU on AES Encryption." Advanced level (degree of Master (Two Years)), School of Electrical Engineering Blekinge Institute of Technology, Karlskrona Sweden, 2014.
[12] Ali, Fakhrulddin H. Dawod, Amar I. "FPGA Based Implementation Of Concatenation Matrix". Al-Rafidain Engineering Journal, Vol. 18, pp. 15-31, 21/ June 2009.
[13] Ali, Fakhrulddin H. "Transformation Matrix for 3D computer Graphics Based on FPGA". Al-Rafadain Engineering Journal, Vol. 20, pp. 1-15, 1/Oct 2012.
[14] Olukotun, Kunle, Basem A. Nayfeh, Lance Hammond, Ken Wilson, and Kunyung Chang. "The case for a single-chip multiprocessor". The ACM Seventh International Conference on Architectural Support for Programming Languages and Operating Systems. 1996, pp. 2-11.
[15] R. Bittner, and E. Ruf, "Direct GPU/FPGA Communication via PCI Express". 2012 41st International Conference on Parallel Processing Workshops, on IEEE, Sep 2012, pp.135-139.
[16] M. Hulkkonen,"Graphics Processing Unit Utilization in CircuitSimulation", PhD diss, school of electrical engineering, Aalto University, 2011.
[17] Sodan, A.C., Machina, J., Deshmeh, A. Macnaughton, K., Esbaugh, B. "Parallelism via Multithreaded and Multicore CPUs". Computer Journal, pp. 24-32, March 2010.

Downloads

Published

2016-10-25

How to Cite

Aldulaimi, D. F., & Alshakargy, H. (2016). Execution Speed up of Image Rotation Matrix Using Parallel Technique. American Scientific Research Journal for Engineering, Technology, and Sciences, 26(2), 1–17. Retrieved from https://asrjetsjournal.org/index.php/American_Scientific_Journal/article/view/2232

Issue

Section

Articles