FIR Filter for Audio Signals Based on FPGA: Design and Implementation

Authors

  • Abdulbasit M. Sabaawi Communications and Signal Processing Department, Newcastle University, UK

Keywords:

FIR Filters, Digital Filters, FPGA, I2C Protocol, Codec chip (WM8731).

Abstract

Filters play a vital role in digital signal processing (DSP) applications ranging from Video and image processing to wireless communication. In this paper, Low pass digital finite impulse response (FIR) filter is designed and implemented. Eight coefficients and taps are used in the design. The whole system are coded in VHDL language using modular design approach and implemented in Altera DE1 board. This board has cyclone II Field Programmable Gate Array (FPGA), Codec chip (WM8731), Embedded DSP multipliers and embedded processor support. The design is implemented as three main blocks: Codec initialization block, serial to parallel (S2P) Adapter block and FIR filter block. The blocks are tested and simulated in order to ensure that the result is correct. Finally, the Quartus II software tool is used to evaluate the implementation results and obtain the frequency response of the designed filter.

References

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Published

2016-08-22

How to Cite

M. Sabaawi, A. (2016). FIR Filter for Audio Signals Based on FPGA: Design and Implementation. American Scientific Research Journal for Engineering, Technology, and Sciences, 24(1), 63–75. Retrieved from https://asrjetsjournal.org/index.php/American_Scientific_Journal/article/view/1999

Issue

Vol. 24 No. 1 (2016)

Section

Articles

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